- HOME
- Á¦Ç°¼Ò°³
- Á¦Ç°¼Ö·ç¼Ç
- Soc ¼Ö·ç¼Ç
-
-
- Virtex-6 LX760 FPGA 1~2°³ žÀç °¡´ÉÇÑ SoC/ASIC
- ¼³°è ¹× °ËÁõ½Ã½ºÅÛ
- FPGA °ÔÀÌÆ® 7õ¸¸~2¾ï1õ¸¸, ASIC °ÔÀÌÆ® 7¹é¸¸~2õ¸¸
- ¼ö¿ë
- ARM Cortex A8, ARM11 (S3C6410), ARM926, ARM1136,
- MPCore Áö¿ø
- FPGA Àü ÇÉ¿¡ Trace Length Matching ¼³°è·Î ÄÁ³ØÅÍ
- Skew ÃÖ¼ÒÈ
- LVDS Impedance ¸ÅĪÀ¸·Î °í¼Ó LVDS µ¿ÀÛ
- LX760 1160 ÇÉ I/O »ç¿ë °¡´É
- Clock Generator¹× Fan-out Buffer Àû¿ëÀ¸·Î Clock Skew ÃÖ¼ÒÈ
- °¢ Ä¿³ØÅͺ°·Î Àü¿øÀÌ ºÐ¸®µÇ¾î ´Ù¾çÇÑ ÁÖº¯ÀåÄ¡ ¸ðµâÀ»
- µ¿½Ã¿¡ »ç¿ë
- Xilinx MIG¸¦ ÅëÇØ »ý¼ºÇÑ ¸Þ¸ð¸® ÄÁÆ®·Ñ·¯¸¦ »ç¿ë
- SystemACE ³»ÀåÀ¸·Î ´ë¿ë·® Configuration
- JTAGÀ» ÅëÇÑ ILA »ç¿ë °¡´É
-
Ư¡
´ë¿ë·® °ÔÀÌÆ® / °í¼Ó µ¿ÀÛÀ» À§ÇÑ SoC Prototyping PlatformÀÔ´Ï´Ù.
ÈÞÀνº RPS(Rapid Prototyping System) Á¦Ç°Àº SoC, ASIC¸¦ À§ÇÏ¿© RTL ¼³°è ÀÌÈÄ¿¡ H/W¹× S/W¸¦ ºü¸¥ ½Ã°£¿¡ °ËÁõÇÒ ¼ö ÀÖ´Â ÇÁ·ÎÅäŸÀÌÇÎ ¼Ö·ç¼ÇÀÔ´Ï´Ù.
RPS-7601Àº Á¡Â÷ ´ë¿ë·®È °í¼Ó µ¿ÀÛÀ» ÇÊ¿ä·Î ÇÏ´Â SoC/ASICÇÁ·ÎÅäŸÀÌÇÎ ¿ä±¸¿¡ ºÎÇյǵµ·Ï ¼³°èµÈ ÇÁ·ÎÅäŸÀÌÇÎ Ç÷§ÆûÀ¸·Î FPGA¿Í ÄÁ³ØÅÍ °£ÀÇ Trace length matching ¼³°è¸¦ ÅëÇØ °¢ ÄÁ³ØÅͱîÁöÀÇ Skew¸¦ ÃÖ¼ÒÈÇÏ¿´À¸¸ç, ÄÁ³ØÅÍ·Î ¿¬°áµÇ´Â ¸ðµç I/O´Â LVDS¸¦ Áö¿øÇÕ´Ï´Ù.
º¸µå»ó¿¡¼ 4°³ÀÇ Å¬·°¼Ò½º¸¦ °¡Áö¸ç, Ŭ·°Àº 1~340MHzÀÇ ¹üÀ§¸¦ °¡Áø Ŭ·° Á¦³×·¹ÀÌÅÍ°¡ 3°³, 31.25~700MHzÀÇ ¹üÀ§¸¦ °®´Â Ŭ·°Á¦³×·¹ÀÌÅÍ°¡ 1°³·Î ±¸¼ºµÇ¸ç, ¸ðµâ ½ºÅÂÅ·½Ã¿¡µµ °¢ ¸ðµâ·Î °ø±Þ µÇ´Â Ŭ·°ÀÇ ½ºÅ¥°¡ ÃÖ¼ÒÈ µÇµµ·Ï ¼³°èµÇ¾î ÀÖ½À´Ï´Ù.
FPGA º¸µå´Â ¾ÈÁ¤ÀûÀ¸·Î µ¿ÀÛÇÏ´Â °ÍÀÌ °¡Àå Áß¿äÇÕ´Ï´Ù. RTL ¼³°è½Ã FPGA µ¿ÀÛ ºÒ¾ÈÀ¸·Î ¿£Áö´Ï¾î°¡ ¸¹Àº ½Ã°£À» ¼ÒºñÇÏ°Ô µÇ°í ÇÁ·ÎÁ§Æ®¸¦ ½Ã°£³»¿¡ ¿Ï·áÇÏÁö ¸øÇÑ °æ¿ì°¡ ÀÚÁÖ ¹ß»ýÇÕ´Ï´Ù. FPGA È¿À²Àû ¹èÄ¡, CPU¸ðµâ°ú ÀÎÅÍÆäÀ̽º, Clock Scheme, PCB Pattern ¼³°è, Impedance Matching, SMT, Testing SWµî¿¡ ÃÖ°íÀÇ ±â¼ú·ÂÀ» °¡Áö°í ÀÖ½À´Ï´Ù. ÈÞÀνº´Â Áö³ 10¿©³â°£ FPGA º¸µå ¼³°è¸¦ ¼º°øÀûÀ¸·Î ¼öÇàÇÏ¿´½À´Ï´Ù. ºü¸¥ ½Ã°£³»¿¡ FPGAº¸µå¸¦ ¼³°èÇϸç ARM Core ¿¡ ´ëÇÑ ³ëÇϿ츦 º¸À¯ÇÏ°í ÀÖ½À´Ï´Ù. ¶ÇÇÑ Test SW¸¦ ¼³°èÇϰųª ÀÓº£µðµå ¸®´ª½º, Widows CE, RTOS ¼³°è´É·ÂÀ» º¸À¯ÇÏ°í ÀÖ½À´Ï´Ù. ´Ü¼øÇÑ FPGAº¸µå ¼³°è¸¦ ³Ñ¾î¼± ARM Core ¹× ARM Debugging, RTL Verilog HDL ºÐ¼®, DDR3/DDR2 ŸÀÌ¹Ö ºÐ¼® ¼³°è, DVI ¸ðµâ ¼³°è, HDMI ¼³°è, PCI Express, Cardbus, USB/Ethernet ¸ðµâ ÀÎÅÍÆäÀ̽º, ADC/ADC µî¿¡ ´ëÇÑ ±â¼úÀ» º¸À¯ÇÏ°í ÀÖ½À´Ï´Ù. ±¹³» ÃÖ°íÀÇ ±â¼ú·ÂÀ¸·Î ÈÞÀνº´Â °¡Àå ¾ÈÁ¤ÀûÀÌ°í È¿À²ÀûÀÎ º¸µå¸¦ Á¦°øÇÏ°íÀÚ ÇÕ´Ï´Ù. »ç¿ëÀÚ´Â ºÒÇÊ¿äÇÑ H/W Á¦ÀÛ ¹× µð¹ö±ë¿¡ µå´Â ºñ¿ëÀ» ÃÖ¼ÒÈÇÒ ¼ö ÀÖ½À´Ï´Ù. ÈÞÀνº´Â »ï¼ºÀüÀÚ, LGÀüÀÚ, E»ç, C»ç, Çѱ¹ÀüÀÚÅë½Å¿¬±¸¼Ò µî¿¡¼ ¸¹Àº ÇÁ·ÎÁ§Æ®¸¦ ¼öÇàÇÑ °æÇèÀ» °¡Áö°í ÀÖ½À´Ï´Ù. RPS-LX7601 Àº RPS-LX760M ¸ðµâ ±â¹ÝÀ¸·Î ÃÖ´ëÀÇ È®À强À» Á¦°øÇÕ´Ï´Ù. SoC/ASIC °³¹ß½Ã Gate ¿ë·®ÀÌ Áõ°¡ÇÔ¿¡ µû¶ó ÇÁ·ÎÅäŸÀÌÇÎ ÇÏ°íÀÚ ÇÒ °æ¿ì¿¡´Â ´ë¿ë·®ÀÇ FPGA°¡ ÇÊ¿äÇÕ´Ï´Ù. RPS-LX7601Àº XilinxÀÇ ÃֽŠVirtex6 XC6VLX760À» žÀçÇÑ RPS-LX760M¸ðµâÀ» žÀçÇÑ º¸µå·Î¼ FPGA ¸ðµâÀ» 2°³±îÁö StackingÀÌ °¡´ÉÇÏ¿© ÇÊ¿ä½Ã FPGA¸ðµâÀÇ Ãß°¡¸¸À¸·Îµµ °ÔÀÌÆ® ¿ë·®ÀÇ È®ÀåÀÌ °¡´ÉÇÑ ±¸Á¶ÀÔ´Ï´Ù. È®ÀåÀ» À§ÇØ 2´Ü±îÁö Stacking °¡´ÉÇϵµ·Ï Ŭ·° ¶óÀÎ ¹× JTAG ȸ·Î ¼³°è¸¦ ÇÏ¿© °¢ FPGA¸ðµâÀÇ clock skew¸¦ ÃÖ¼ÒÈ ÇÏ°í, JTAG ¹× SelectMAP ConfigurationÀÌ °¡´ÉÇϵµ·Ï ¼³°èµÇ¾úÀ¸¸ç, Ŭ·° ¹× ¸®¼Â, LED, PBSWÁ¦¿ÜÇÑ FPGAÀÇ ´ëºÎºÐÀÇ IO¸¦ »ç¿ëÇÒ¼ö ÀÖµµ·Ï ¼³°èÇÏ¿´½À´Ï´Ù.
RPS-7601 Base I/O ¿¬°áµµ
RPS-7601 Base Clock ¿¬°áµµ
RPS-7601 Base JTAG ¿¬°áµµ
RPS-760MÀº °¡Àå ÀÌ»óÀûÀ¸·Î ¼³°èµÈ LX760 FPGA¸ðµâÀÔ´Ï´Ù.
ÃÖ½ÅÀÇ SoC ÇÁ·ÎÅäŸÀÌÇÎ ½Ã¿¡´Â ´ë¿ë·®ÀÇ FPGA°¡ ÇÊ¿äÇÕ´Ï´Ù.
RPS-760MÀº XilinxÀÇ ÃֽŠVirtex6 XC6VLX760À» žÀçÇÑ ¸ðµâ·Î º£À̽ºº¸µå¿¡ ÀåÂøµÇ¾î µ¿ÀÛÇϸç, 4°³ÀÇ Upper Connector¸¦ ÀÌ¿ëÇÏ¿©, ¸ðµâÀ» ½ÇÀåÇϰųª 4°³ÀÇ Lower Connector¸¦ ÀÌ¿ëÇÏ¿© º£À̽ºº¸µå ¶Ç´Â FPGA¸ðµâ À§¿¡ StackingÀÌ °¡´É Flexible Modular FPGA º¸µåÀÔ´Ï´Ù.
RPS-760M ¸ðµâÀÇ °¢ IO Connector´Â °¢°¢ 120ÇÉÀÇ IO¸¦ »ç¿ëÇÒ ¼ö ÀÖÀ¸¸ç, ClockCapable/Vref/Vrn/VrpÇÉÀÇ ¹èÄ¡°¡ µ¿ÀÏÇÏ¿©, ¸ðµâÀ» ¸ðµç Connector¿¡ »ç¿ëÇÒ ¼ö ÀÖ½À´Ï´Ù. ÃÑ 8°³ÀÇ Ä¿³ØÅÍ¿¡ ¸ðµâÀÇ ÀåÂøÀÌ °¡´ÉÇÏ¸ç °¢°¢ ´Ù¸¥ IO Standard·Î ¼³Á¤ÇÏ¿© »ç¿ëÇÒ ¼öµµ ÀÖ½À´Ï´Ù.
°¢ Ä¿³ØÅͺ°·Î Àü¿øºÐ¸®(9°³)µÇ¾î ´Ù¾çÇÑ ÁÖº¯ÀåÄ¡ ¸ðµâÀ» µ¿½Ã¿¡ »ç¿ëÇÒ ¼ö ÀÖÀ¸¸ç, Xilinx MIG¸¦ ÅëÇØ »ý¼ºÇÑ ¸Þ¸ð¸® ÄÁÆ®·Ñ·¯¸¦ »ç¿ëÇÒ ¼ö ÀÖµµ·Ï ¼³°èµÇ¾î ÀÖ½À´Ï´Ù.
Trace length matching ¼³°è¸¦ ÅëÇØ °¢ ÄÁ³ØÅÍ Skew¸¦ ÃÖ¼ÒÈÇÏ¿´À¸¸ç LVDS Impedance MatchingµÇ¾î LVDS¸¦ Áö¿øÇÏ¿© °í¼Ó µ¿ÀÛÀÌ °¡´ÉÇÕ´Ï´Ù.
°·ÂÇÑ Å¬·° ±¸Á¶
SoC ÇÁ·ÎÅäŸÀÌÇνà ´Ù¾çÇÑ Å¬·°ÀÇ °ø±ÞÀÌ ÇÊ¿äÇϸç, Ŭ·°ÀÇ ÁöÅÍ ¹× Skew ¹ß»ý½Ã Logic µ¿À۽à ½É°¢ÇÑ ¿µÇâÀ» ÃÊ·¡ÇÏ°Ô µË´Ï´Ù. RPS-LX7601Àº DIP½ºÀ§Ä¡ÀÇ ¼³Á¤¸¸À¸·Î 1~340MHzÃâ·ÂÀÌ °¡´ÉÇÑ Å¬·°ÀÌ 3°³¿Í, 31.5~511MHz Ãâ·ÂÀÌ °¡´ÉÇÑ Å¬·° 1°³µî ÃÑ 4°³ÀÇ Global ClockÀ» RPS-760M ¸ðµâ·Î ÀÔ·ÂÇϸç, StackingµÇ´Â ¸ðµâÀÇ Å¬·° ½ÅÈ£¿¡ µû¶ó PCB Trace Pattern±æÀ̸¦ Á¶Á¤ÇÏ¿©, Skew¸¦ ÃÖ¼ÒÈÇÏ¿´½À´Ï´Ù.
º£À̽ºº¸µå·ÎºÎÅÍÀÇ Global Clock ¼Ò½º4°³¸¦ LVDS ¶Ç´Â Single Ended Ŭ·° ÀÔ·ÂÀ» ¹ÞÀ» ¼ö ÀÖÀ¸¸ç, ÀÌ¿Í´Â º°µµ·Î °¢ FPGA¿¡ ¿¬°áµÈ 16°³ÀÇ Å¬·° I/OÄÁ³ØÅ͸¦ ÀÌ¿ëÇÏ¿© ¿ÜºÎÀÇ Global ClockÀ¸·Î ÀԷ¹ްųª Ãâ·ÂÇÒ ¼ö ÀÖ½À´Ï´Ù.
FPGA¹× CPU, I/OÀ» »óÈ£ ¿¬°áÇÒ ¼ö ÀÖ´Â RapidBus ÀÔ´Ï´Ù.
SoC / ASIC À» °³¹ß ½Ã¿¡ »óÈ£ ¿¬°á¼º(Interconnection)ÀÌ °¡Àå Áß¿äÇÕ´Ï´Ù. RPS-7601Àº 120ÇÉ RapidBus ÄÁ³ØÅÍ°¡ Upper side 4°³, lower side¿¡ 4°³°¡ ÀåÂøµÇ¾î FPGA ¸ðµâ, CPU ¸ðµâ, DDR3/DDR2 ¸ðµâ, PCIexpress ¸ðµâ, µð¹ö±ë ¸ðµâ, Åë½Å¸ðµâ, DVI¸ðµâ, ADC/DAC¸ðµâ, USB, Ethernet, PCI Express, SATA, ARM Core, DVI, Logic analyzer ¿¬°á ¹× È®Àå¿ëÀ¸·Î »ç¿ëÇϵµ·Ï µÇ¾î ÀÖ½À´Ï´Ù.
°ËÁõ¿ë È®Àå I/O ¸ðµâ
Item |
Specification |
CON 1X1 |
1 connector for stackable height |
CON 2X1 |
2 interconnect for 2 horizontal connector |
CON 1X2 |
2 interconnect for 2 vertical connector |
PROBE HEADER |
HEADER CONNECTORs for Probing - 1 Connector use - 40 header * 4 |
PROBE MICTOR |
MICTOR CONNECTORs for Probing - 1Connector use - MICTOR Connector * 4 |
32MB NorFLASH |
32MB Nor Flash - Datawidth : 32bit - 1 connector use |
64MB SDRAM |
64MB 32bit Mobile SDR SDRAM Module - Datawidth : 32bit - 1 connector use |
128MB DDR SDRAM |
128MB 32bit Mobile DDR SDRAM Module - Datawidth : 32bit - 1 connector use |
DDR2 SO-DIMM |
DDR2 SO-DIMM for DDR2 SDRAM - Datawidth : 64bit - 2 connectors use |
DDR3 SO-DIMM |
DDR3 SO-DIMM for DDR3 SDRAM - Datawidth : 64bit - 2 connectors use |
UART/USB2.0 |
2 UART port, USB High-speed GPIF(CY7C68013A) - 1 connector use |
Gigabit Ethernet Phy |
Gigabit Ethernet Phy(M88E111) - 1 connector use |
PCI Express Phy |
PCI Express Phy 1Lane(PX1011) - 1 connector use |
l °ËÁõ¿ë È®Àå ¸ðµâÀº ¼±Åà »çÇ×ÀÔ´Ï´Ù.
ARM Core Tile ¹× »ï¼º Core CPU ¸ðµâ ÀÎÅÍÆäÀ̽º
Item |
Specification | ||
S3C6410 (ARM11) Module |
A. S3C6410 CPU B. 128MB mDDR, 1GB NAND, MicroSD Socket C. USB HOST 1port, OTG 1port UART 2port D. 229 GPIO available (2*120pin connectors) E. Connectors are compatible for MFP Series and RPS Series | ||
ARM CT11MPCore |
Four ARM11 MPCore CPUs with VFP and 32KB L1 caches 1MB of unified L2 cache 2 external multiplexed AXI interfaces Tile form factor High density stacking connectors | ||
ARM1176 Core Tile |
Single ARM1176JZF-S CPU with VFP and 16KB caches and TCMs 128KB of internal AXI RAM ARM *TrustZone Technology On chip ETM11CS with external MICTOR trace connector External multiplexed 64-bit AXI interface | ||
ARM1136 Core Tile |
ARM1136JS-F processor test chip Tile form factor High density stacking connectors Two PISMO¢â connectors for memory expansion boards | ||
ARM926 Core Tile |
ARM926EJ-S processor test chip Tile form factor High density stacking connectors Two PISMO¢â connectors for memory expansion boards | ||
ARM7 TDMI |
ARM7TDMI processor test chip Tile form factor High density stacking connectors Two PISMO¢â connectors for memory expansion boards | ||
TI DSP TMS320C6416 Module |
|
TI DSP TMS320C6416 SDRAM included | |
Core Tile Adaptor |
|
ARM Core Tile to FPGA Modules |
Specification | ||
FPGA |
Xilinx Virtex-6 XC6VLX760-1C FF1760 1ea | |
Main Clock Source |
ISPCLK5620AV *3ea (1~340MHz) IDT5T9310 * 1ea(31.25~700MHz) | |
Reference Clock |
3 PLL(ICS8402) : 16 ~ 340MHz 1 PLL(IDT84329B) : 31.25~700MHz | |
Clock Connector |
▪ 4 Differential/4 Single-Ended Clock In/out Connectors 8ea(FPGA Module) ▪ 4 Differential/4 Single-Ended Clock out Connectors 8ea(FPGA Module) ▪ 4 Diffrential/4 Single-Ended Ext.Reference Clock In Connectors(Baseboard) ▪ 3 Differential/3 Single-Ended Feedback Clock In Connectors(baseboard) ▪ 5 Differential / 5 Single-Ended Clock Out Connectors(Baseboad) ▪ 5 Differential Clock Out Connectors(Baseboard) | |
External I/O Connector |
Total 1159 I/Os : Flexible I/O - 480 I/Os : 120pins Connectors 4ea (FPGA Module Upper side) - 112 I/Os : 120pins Connector 1ea(FPGA Module Upper side) - 40 I/Os : 120pins Connector 1ea(FPGA Module Upper side) - 480 I/Os : 120pins Connectors 4ea (Base Board side) - 8 LEDs, 4 PBSWs, 8 DIPSWs | |
Configuration JTAG |
On Board SystemACE/JTAG | |
Power |
ATX 400W Power Supply | |
ETC Regulator |
2.5V/5A Regulator 3.3V/5A Regulator | |
FPGA Vcco Regulator Modules 9 Vcco Regions |
2.5V/1.8V/1.5V/1.2V |
RPS-7601 Configuration»ç¾ç
Item |
Specification |
RPS-LX7601-1M |
RPS-7601, RPS-760M ( XilinX Virtex6-LX760 ) 1 EA |
RPS-LX7601-2M |
RPS-7601, RPS-760M ( XilinX Virtex6-LX760 ) 2 EA |
RPS-LX7601-3M |
RPS-7601, RPS-760M ( XilinX Virtex6-LX760 ) 3 EA |
• ¼³°è»ç¾ç °áÁ¤ºÎÅÍ ÇÁ·ÎÅäŸÀÌÇÎ µ¥¸ð±îÁö One-Stop ¼ºñ½º
- XilinX Virtex-6/5 ¹× Altera Stratix FPGA »ç¿ë
- ARM7, ARM926, ARM1176, Cortex A8, Cortex M3, PXA320, Samsung6410/C100 ÇÁ·Î¼¼¼ »ç¿ëÇÑ ½Ã½ºÅÛ ¼³°è °¡´É
- Flash, DDR2, ADC/DAC, PCI Express, USB2.0 Host/Client, Cadbus, AC97, CIS, DMB, OFDM, Modem I/F, TFT LCD, MPEG, H.264, DVI, HDMI µî ´Ù¾çÇÑ ÁÖº¯ÀåÄ¡ ÀÎÅÍÆäÀ̽ºÀÇ ±â¼ú¿¡ ´ëÇÑ °æÇèÀ» º¸À¯
- ½Ã½ºÅÛ·¹º§ °ËÁõ½Ã H/W & S/Wµð¹ö±ë¿¡ ´ëÇÑ ³ëÇÏ¿ì º¸À¯
- °¢Á¾ ÁÖº¯ÀåÄ¡ÀÇ °³¹ßÀÌ °¡´ÉÇÏ¸ç µð¹ö±ë±îÁö ±â¼ú ¼ºñ½º Á¦°ø
• SoC ¼³°è ¹× IP °ËÁõ, DSP ¼³°è ¹× °³¹ß
- ARM7, ARM926, ARM1176, Cortex A8, Cortex M3, PXA320, Samsung6410/C100 ¸¦ À§ÇÑ SoC °³¹ß
- AMBA AHB/AXI¸¦ ÅëÇÑ FPGA¿Í ¿¬°á
- FPGA¸¦ ÀÌ¿ëÇÑ AMBA IPÀÇ °³¹ß ¹× ½Ã½ºÅÛ °ËÁõ
- PowerPC/MicroBlaze/NIOS/LEON3 ÇÁ·Î¼¼¼ ÄÚ¾î ±â¹Ý SOC ¼³°è °¡´É
• ÁÖº¯ ÀåÄ¡ ¼³°è ¹× °ËÁõ
- ARM Primecell ¹× AMBA Bus °ü·Ã IP ¼³°è °ËÁõ
- DDR3/DDR2, DVI ¸ðµâ, HDMI ¼³°è, Cardbus, ADC/ADC ¼³°è °ËÁõ
- USB2.0 OTG, 10/100/1000 Ethernet, PCI ExpressµîÀÇ °í¼Ó Åë½Å ÀÎÅÍÆäÀ̽º
• ÀÓº£µðµå OS Ä¿³Î ¹× µð¹ÙÀ̽º µå¶óÀ̹ö ¼³°è
- ARM7, ARM926, ARM1176, Cortex A8, Cortex M3, PXA320, Samsung6410/C100 ÄÚ¾î ´ëÇÑ ÀÓº£µðµå ¸®´ª½º Ä¿³Î ¹× µð¹ÙÀ̽º µå¶óÀ̹ö °³¹ß
- ÁÖº¯ÀåÄ¡ µð¹ÙÀ̽º µå¶óÀ̹ö °³¹ß ¹× °ËÁõ
• °í¼ÓÀÇ ½Åȣ󸮸¦ À§ÇÑ DSP ½Ã½ºÅÛ ¼³°è ¹× °ËÁõ
- °í¼ÓÀÇ ¸ÖƼ¹Ìµð¾î ¹× Åë½Å½Ã½ºÅÛ ±¸ÇöÀ» À§ÇÑ TI DSP ¸ðµâ±â¹Ý ½Ã½ºÅÛ ¼³°è
- FPGA¿Í DSP ¶Ç´Â ARM°ú DSP¸¦ ¿¬µ¿ÇÑ ½Ã½ºÅÛÀÇ ±¸Çö
ASIC / SoC Prototyping |
Image Processing ¼³°è¹×°ËÁõ |
• SoC Rapid Prototyping |
• MPEG, MPEG4, M-JPEG, H.264 |
Core Prototyping |
High Speed Test Platform |
• Cortex A8, Cortex A9, • Cortex M3 • Cortex M0 • ARM11, ARM9, ARM7 • Core A, NEON |
• WiBRO Modem Test Platform |
1) MFP-LX330-Nine º¸µå
(2) RPS7000 & optional boards
(3) ARM Core, FPGA ÀûÃþ ±¸Á¶ ¼³°è, ARM926/1136, XilinX FPGA ÀûÃþ ±¸Á¶ ¼³°è
(4) ARM Emulation Base + MPCore + XilinX FPGA
(5) Huins SoC Verification Platforms
l RPS-3000 Virtex LX330+ARM CoreTile
l RPS-3000 Virtex LX330+ 2 ARM CoreTile
l Virtex-5 FPGA Module with DRAM
l XilinX Virtex4 + Altera Excalibur (ARM922T)
l Altera Excalibur (ARM922T)+ XilinX FPGA
l MFP-LX330Q
l Altera Excalibur SoC °ËÁõ Ç÷§Æû, ARM922T+FPGA, 2003