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MFP-LX330Q


SoC/ASIC Design and Verification System based
on 4 Virtex-5 LX330

Upto ASIC 12M~24M Gates

Supports ARM Cortex A9, A8, ARM11, ARM926,
ARM1176, MPCore

Trace Length Matching for each pins of FPGA

Minimize Clock Skew with Clock Generator/Buffer

High Speed LVDS, Impedance Matching

Total 3134 I/O pins available

Separate power design for each connectors

Includes DDR3 Memory Controller (Xilinx MIG),
SystemACE

Peripherals : DDR3, Core Tile Adaptors, AD/DA,
SDRAM module, SRAM, Flash