- HOME
 
- Products
 
- Soc Solution
 
- 
		
- 
				

 Virtex-6 LX760 FPGA 1~12°³ žÀç °¡´ÉÇÑ SoC/ASIC 
- ¼³°è ¹× °ËÁõ
 
 FPGA °ÔÀÌÆ® 7õ¸¸~5¾ï, ASIC °ÔÀÌÆ® 7¹é¸¸~5õ¸¸ 
- ¼ö¿ë °¡´É
 
 ARM Cortex A8, ARM11 (S3C6410), ARM926, ARM1136, 
- MPCore ¼³°è
 
 ADC/DAC, DVI, PCIe, USB/Ethernet,HDMI ¼³°è 
 FPGA Àü ÇÉ¿¡ Trace Length Matching ¼³°è·Î ÄÁ³ØÅÍ 
- Skew ÃÖ¼ÒÈ
 
 LVDS Impedance ¸ÅĪÀ¸·Î °í¼Ó LVDS µ¿ÀÛ 
 I/O ÇÉ ¸ðµâÇüÅ·Π¼³°è 
 Clock Generator¹× Fan-out Buffer Àû¿ëÀ¸·Î Clock 
- Skew ÃÖ¼ÒÈ
 
 °¢ Ä¿³ØÅͺ°·Î Àü¿øÀÌ ºÐ¸®µÇ¾î ´Ù¾çÇÑ ÁÖº¯ÀåÄ¡ 
- ¸ðµâÀ» µ¿½Ã¿¡ »ç¿ë
 
 Xilinx MIG¸¦ ÅëÇØ »ý¼ºÇÑ ¸Þ¸ð¸® ÄÁÆ®·Ñ·¯¸¦ »ç¿ë 
 SystemACE ³»ÀåÀ¸·Î ´ë¿ë·® Configuration 
 JTAGÀ» ÅëÇÑ ILA »ç¿ë °¡´É

 
 - 
				
 
| 
 Item  | 
 Specification  | |
| 
 FPGA Module Site  | 
 Rapid ASIC/SoC Prototyping System with Quad Xilinx Virtex-6 LX760 FPGAs - Xilinx Virtex-6 LX760 FPGA ¸ðµâ 4°³ ±âº» žÀç, 8°³±îÁö È®ÀåÀÌ °¡´É   | |
| 
 Main Clock Source  | 
 ISPCLK5620AV *3ea (1~340MHz) IDT5T9310 * 1ea(31.25~700MHz)  | |
| 
 Reference Clock  | 
 3 PLL(ICS8402) : 16 ~ 340MHz 1 PLL(IDT84329B) : 31.25~700MHz)  | |
| 
 Clock Connector  | 
 4 Source and 16 Clock in/out connectors for each FPGA - Clock source(total 4ea) : 16~340MHz Clock Generator 3ea, 31.25~700MHz 1ea - Clock connectors ▪ 4 Differential/4 Single-Ended Clock In/out Connectors 8ea(FPGA Module) ▪ 4 Differential/4 Single-Ended Clock out Connectors 8ea(FPGA Module) ▪ 4 Diffrential/4 Single-Ended Ext.Reference Clock In Connectors(Baseboard) ▪ 3 Differential/3 Single-Ended Feedback Clock In Connectors(baseboard) ▪ 2 Differential  / 2 Single-Ended Clock Out Connectors(Baseboad) ▪ 2 Differential Clock Out Connectors(Baseboard)  | |
| 
 Total I/O Pins  | 
 Total 1159 I/Os : Flexible I/O - 1920 I/Os : 120pins Connectors 16ea (FPGA Module Upper side) - 160 I/Os : 120pins Connector 1ea(FPGA Module Upper side) - 480 I/Os : 120pins Connectors 4ea (Base Board side) FPGA Interconnction - A¡êB : 272, C¡êD : 272 signals   | |
| 
 External I/O Connector  | 
 FA_C1L(120), FB_C2L(120), FC_C3L(120), FD_C4L(120)  | |
| 
 ETC I/O  | 
 Reset(1)  | |
| 
 Configuration JTAG  | 
 On Board SystemACE/JTAG, SelectMAP Module Connector  | |
| 
 Power  | 
 ATX 600W Power Supply  | |
| 
 ETC Regulator  | 
 2.5V/5A Regulator *1ea 3.3V/5A Regulator *1ea  | |
| 
 FPGA VCCO Regulator Modules 9 Vcco regions  | 
 2.5V/1.8V/1.5V/1.2V * 9ea  | |
 
 °ËÁõ¿ë È®Àå ¸ðµâ| 
 Item   | 
 Specification   | 
| 
 CON 1X1  | 
 1 connector for stackable height  | 
| 
 CON 2X1  | 
 2 interconnect for 2 horizontal connector  | 
| 
 CON 1X2  | 
 2 interconnect for 2 vertical connector  | 
| 
 PROBE HEADER  | 
 HEADER CONNECTORs for Probing -      1 Connector use -      40 header * 4  | 
| 
 PROBE MICTOR  | 
 MICTOR CONNECTORs for Probing -      1Connector use -      MICTOR Connector * 4  | 
| 
 32MB NorFLASH  | 
 32MB Nor Flash -      Datawidth : 32bit -      1 connector use  | 
| 
 64MB SDRAM  | 
 64MB 32bit Mobile SDR SDRAM Module -      Datawidth : 32bit -      1 connector use  | 
| 
 128MB DDR SDRAM  | 
 128MB 32bit Mobile DDR SDRAM Module -      Datawidth : 32bit -      1 connector use  | 
| 
 DDR2 SO-DIMM   | 
 DDR2 SO-DIMM for DDR2 SDRAM -      Datawidth : 64bit -      2 connectors use  | 
| 
 DDR3 SO-DIMM   | 
 DDR3 SO-DIMM for DDR3 SDRAM -      Datawidth : 64bit -      2 connectors use  | 
| 
 UART/USB2.0  | 
 2 UART port, USB High-speed GPIF(CY7C68013A) -      1 connector use  | 
| 
 Gigabit Ethernet Phy  | 
 Gigabit Ethernet Phy(M88E111) -      1 connector use  | 
| 
 PCI Express Phy  | 
 PCI Express Phy 1Lane(PX1011) -      1 connector use  | 
 
| 
 Item   | 
 Specification   | ||
| 
 S3C6410 (ARM11) Module  | 
 
 A. S3C6410 CPU B. 128MB mDDR, 1GB NAND, MicroSD Socket C. USB HOST 1port, OTG 1port UART 2port D. 229 GPIO available (2*120pin connectors) E. Connectors are compatible for MFP Series and RPS Series  | ||
| 
 ARM  CT11MPCore  | 
![]()  | 
 Four ARM11 MPCore CPUs with VFP and 32KB L1 caches 1MB of unified L2 cache 2 external multiplexed AXI interfaces Tile form factor High density stacking connectors  | |
| 
 ARM1176 Core Tile  | 
![]()  | 
 Single ARM1176JZF-S CPU with VFP and 16KB caches and TCMs 128KB of internal AXI RAM ARM *TrustZone Technology On chip ETM11CS with external MICTOR trace connector External multiplexed 64-bit AXI interface  | |
| 
 ARM1136 Core Tile  | 
![]()  | 
 ARM1136JS-F processor test chip  Tile form factor  High density stacking connectors  Two PISMO¢â connectors for memory expansion boards  | |
| 
 ARM926 Core Tile  | 
![]()  | 
 ARM926EJ-S processor test chip  Tile form factor  High density stacking connectors  Two PISMO¢â connectors for memory expansion boards  | |
| 
 ARM7 TDMI  | 
![]()  | 
 ARM7TDMI processor test chip  Tile form factor  High density stacking connectors  Two PISMO¢â connectors for memory expansion boards  | |
| 
 TI DSP TMS320C6416 Module  | 
 
  | 
 TI DSP TMS320C6416 SDRAM included  | |
| 
 Core Tile Adaptor  | 
 
  | 
 ARM Core Tile to FPGA Modules  | |
| 
 ASIC / SoC Prototyping  | 
 Image Processing ¼³°è¹×°ËÁõ  | 
| 
 • SoC Rapid Prototyping  | 
 • MPEG, MPEG4, M-JPEG, H.264  | 
| 
 Core Prototyping  | 
 High Speed Test Platform  | 
| 
 • Cortex A8, Cortex A9, • Cortex M3 • Cortex M0 • ARM11, ARM9, ARM7 • Core A, NEON  | 
 • WiBRO Modem Test Platform  | 
 SoC/ASIC ÇÁ·ÎÅäŸÀÌÇÎ ¼³°è ÁÖ¿ä½ÇÀû
1)    MFP-LX330-Nine Board

2)  RPS7000 & optional boards
 
3) ARM Core, FPGA ÀûÃþ ±¸Á¶ ¼³°è, ARM926/1136, XilinX FPGA ÀûÃþ ±¸Á¶ ¼³°è 

4) ARM Emulation Base + MPCore + XilinX FPGA
 
5) Huins SoC Verification Platforms
l  RPS-3000 Virtex LX330+ARM CoreTile

l RPS-3000 Virtex LX330+ 2 ARM CoreTile

l Virtex-5 FPGA Module with DRAM

l XilinX Virtex4 + Altera Excalibur (ARM922T)

l  Altera Excalibur (ARM922T)+ XilinX FPGA

l  MFP-LX330Q

l  Altera Excalibur SoC °ËÁõ Ç÷§Æû, ARM922T+FPGA, 2003



























					





























































